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Head of Inference Performance Visibility

Etched · San Jose

onsiteunknown$200,000–$400,000Posted Feb 19, 2026RustC++distributed tracingobservabilitytelemetryprofilingtime synchronization

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About this role

## About Etched Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference, backed by hundreds of millions from top-tier investors and staffed by leading engineers. ## Role: Head of Inference Performance Visibility We’re hiring a **Head of Performance Visibility** to define how performance is understood across next-generation AI accelerator systems. At Etched, performance at this scale is not just a device-level question—it’s a **high-performance distributed systems problem**. You’ll define performance metrics that connect raw hardware signals to distributed workload context, ML cluster dynamics, pod communication patterns, and emergent bottlenecks. This role goes beyond telemetry: you’ll establish new abstractions, structured counter ontologies, cross-layer event correlation frameworks, distributed time-alignment strategies, and scalable reasoning systems operating across nodes, racks, and clusters. ## Key Responsibilities ### System-Level Performance Design - Define the architectural approach for collecting and structuring telemetry across **CPUs, drivers, interconnects, and multiple accelerators** - Design scalable models for correlating performance events across **device and host boundaries** ### Cross-Layer Event Correlation - Align hardware counters, runtime activity, communication phases, and workload semantics into coherent, actionable insight - Implement time synchronization and trace-alignment strategies across **multi-device systems** ### Telemetry & Counter Modeling - Define structured counter taxonomies separating **base signals** from **derived metrics** - Design derived performance models bridging low-level hardware signals and workload-level behavior - Influence instrumentation strategy for future hardware generations ### Distributed Performance Reasoning - Build tools to identify bottlenecks among multi-accelerator workloads across chips within hosts - Build cluster-scale performance analysis for distributed inference across data center networks ### Tooling & Insight Delivery - Contribute to analysis engines and developer-facing tooling that transform raw telemetry into intuitive insight - Shape how performance intelligence is surfaced to engineers debugging large-scale AI systems ## You Might Be a Good Fit If You Have - Deep experience building complex systems at the intersection of **hardware and software** - Personally envisioned and built significant portions of **profiling, tracing, or observability** systems - Demonstrated ability to translate raw hardware signals into scalable, production-grade telemetry and analysis infrastructure - Experience correlating time-series events across **distributed systems** - Deep systems programming expertise (**C++ or Rust**) with a track record of shipping low-level infrastructure close to hardware/runtime systems - Experience designing distributed correlation mechanisms, timestamp-alignment strategies, or performance modeling frameworks across multiple devices/hosts - Experience designing distributed tracing/observability platforms at scale - Experience with high-performance computing systems and large AI training clusters - Experience with timestamp synchronization and event alignment in distributed environments - Experience with hardware counter design and instrumentation strat

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