Sr. Engineer, Performance Infrastructure (RISC-V)
Tenstorrent · Austin, Texas, United States; Santa Clara, California, United States
About this role
Tenstorrent is seeking a **Sr. Engineer, Performance Infrastructure (RISC-V)** to build and run the performance infrastructure shared by our **RISC-V Software** and **RISC-V Performance** teams. This role focuses on the “plumbing” behind performance work—**benchmarking automation, data collection, and workload capture** across **silicon, FPGA/emulation platforms, and performance models**—so performance and software engineers can spend more time on **analysis and optimization** instead of manual experiments. **Location / Work model**: Hybrid — **Austin, TX** or **Santa Clara, CA** --- ## Who You Are - Great at identifying problems and developing solutions, with a bias toward owning the systems you build. - Enjoys building tools and optimizing workflows so other engineers can move faster. - Strong **Linux systems engineering** skills; comfortable wrangling lab machines, clusters, and flaky hardware platforms. - Skilled in **Python** and **shell scripting**, with solid **CI (GitLab)** and **container** experience. - Experienced automating at scale (job scheduling, artifact management, databases, dashboarding). Curiosity about CPU performance is a plus. --- ## What We Need - Build and maintain **benchmarking automation** and **CI pipelines** that run **SPEC** and real-world workloads across **RISC-V silicon, FPGA/emulation platforms, and performance models**. - Own **SimPoint generation and management** infrastructure. - Build performance-data collection into **databases**, with **dashboards and visualization** so trends and regressions are visible without manual effort. - Develop **workload capture and replay** tooling (including **QEMU- and CRIU-based checkpointing**) for reproducible tracing and analysis. - Collaborate closely with performance and software engineers to understand their workflows and remove infrastructure friction. --- ## What You Will Learn - End-to-end exposure to CPU performance work—from **workload capture** through **analysis and convergence**. - Hands-on experience across **pre-silicon and post-silicon** performance platforms (models, emulation, FPGA, and real RISC-V hardware). - Integration of open-source and industry-standard tools into production-grade flows. - Work in a deeply technical, highly collaborative team solving cutting-edge CPU and AI challenges. --- ## Compensation & Notes - Compensation range for all engineers at Tenstorrent: **$100k–$500k** (base + variable), depending on experience, skills, education, background, and location. - Tenstorrent offers a competitive compensation package and benefits and is an **equal opportunity employer**. - **U.S. export-controlled technology**: This position requires access to technology that requires a U.S. export license for certain individuals based on citizenship/permanent residency (EAR Country Groups **D:1, E1, E2**). Employment is contingent on eligibility to access U.S. export-controlled technology.
Listing freshness
CronJobs last confirmed this listing 1h ago. If its source stops confirming the opening for seven days, this page is removed from active inventory.